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simulation: wip simulation loop
author
Lukas Krickl
<lukas@krickl.dev>
Tue, 8 Apr 2025 15:48:21 +0000
(17:48 +0200)
committer
Lukas Krickl
<lukas@krickl.dev>
Tue, 8 Apr 2025 15:48:21 +0000
(17:48 +0200)
src/simulation.s
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src/wram.s
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diff --git
a/src/simulation.s
b/src/simulation.s
index 3e5fb92e49bc482a8485dd180b366a0dac7c795d..3cc948721d50d35f850b345904cea561aedff571 100644
(file)
--- a/
src/simulation.s
+++ b/
src/simulation.s
@@
-6,4
+6,28
@@
; increments cell_idx every iteration
; resets cell_idx to 0 when end of cells is reached
sim_update:
+ ld a, 0 ; max loop counter
+
+ ; load back cell ptr from last iteration
+ ld a, [cell_ptr]
+ ld e, a
+ ld a, [cell_ptr+1]
+ ld d, a
+
+ ; TODO
+ ; for now we just iterate all
+ ; cells in a single go
+ ; later we want a limit
+ ld de, state_cells
+@loop:
+
+ ; jp nz, @loop
+
+
+ ; finally store cell ptr
+ ld e, a
+ ld [cell_ptr], a
+ ld d, a
+ ld [cell_ptr+1], a
+
ret
diff --git
a/src/wram.s
b/src/wram.s
index 1742b51c9c295ad63e51531fd933bd3aa5964f7b..349ca5b4af6abccb6e4837901f1d068636b30ff6 100644
(file)
--- a/
src/wram.s
+++ b/
src/wram.s
@@
-59,7
+59,8
@@
r_population: .adv 2
; current cell index
; for cell update loop
-cell_idx: .adv 2
+ ; big endian
+cell_ptr: .adv 2
state_cells: .adv c_size * MAP_SIZE
state_cells_end: